INF5063 – Programming heterogeneous multi-core architectures

Course content

The course addresses issues related to heterogeneous multi-core architectures that are in all computing varying from mobile phones, commodity desktops to large computing clusters. The students will use and program three different architectures, and have to learn how to handle different types of asymmetric cores, interconnects and memory. During the course, the students will understand the challenges in writing efficient programs for the different architectures.

Lab-assignments are an important part of the course. The students program the SIMD units found in modern processors, graphics processing units (GPUs) from Nvidia and machines connected with PCI Express interconnect from Dolphin Interconnect Solutions.

Learning outcome

After completing INF5063 you can:
  • Understand how a typical multimedia workload such as a video encoder is built up.
  • Use profiling to identify and fix bottlenecks in programs.
  • Detailed knowledge about parallelize, offload and optimize parts of a serial program on heterogeneous multi-core architectures.
  • Use the SIMD units found on almost all modern processors.
  • Program Nvidia GPUs using the CUDA framework.
  • Using PCI Express interconnect to distribute workloads in several machines.

Admission

Students who are admitted to study programmes at UiO must each semester register which courses and exams they wish to sign up for in Studentweb.

If you are not already enrolled as a student at UiO, please see our information about admission requirements and procedures.

Teaching

4 sessions with 6 hours lectures/presentations

3 sessions with 3 hours lab.